Ayan Dutta
Technical Lead, Intel Processor Core and Client computing group, Intel India.
Title:  Moore’s Law – The End Game is Still On


Nearly half a century ago Dr. Moore gave a direction to the semiconductor industry by putting forward his observation that the cost of building block of this digital era would decrease at a steady exponential rate. Innovation in each and every field of VLSI, starting from newer devices, materials, circuits and lithography kept Moore’s law alive. 60X reduction in computation cost,  40X reduction in bandwidth cost and nearly 2X reduction in the price of sensors led to dramatic increases in compute power, energy efficiency and transformed our world with ever-more powerful smart phones, tablets, personal computers and data centers.

At Deep Sub-micron(DSM) technologies, the complexity of designs and technology has grown exponentially as well. This increased complexity has in-turn increased the cost of manufacturing chips, challenging the very basis of Moore’s law. “Moore’s law is dead” or “The end of Moore’s law is very near” are the buzz word around. But is it really so?

This talk would be presenting challenges and the innovation which kept Moore’s law alive and on how the future is shaping up. It would focus on device innovations, architectural innovationsand innovations in the field of circuits and integration. New device structures like Finfets, newer energy efficient computing like approximate computing, newer materials like 2D semiconductors and newer integration techniques like Foveros are still keeping the Moore’s Laws Endgame on and keeps us confident that Moore’s law is still alive.


Ayan is currently working as a technical lead, leading the Digital datapath designs of Intel Processor core in Core and Client computing group at Intel India. In his current role he leads the digital design convergence of Out of order unit in High Performance Cores.  He is also responsible for developing optimization tools and methodologies for faster design convergence and improving efficiency. He has an overall experience of 12 Years in circuits and physical design. Before joining intel he worked in IBM Labs for 8 years on  high performance processors designs.

He is a Senior IEEEmember and has close to 12 Publications in Leading IEEE conferences/Journal and 6 US Patents. His research interest includes Energy efficient computing, Power aware circuit design and PPA Optimisation.